2001-2002 CS 181c: VLSI Design Laboratory

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CS 181c General Information Time and Place Tuesdays and Thursdays, 1:15-2:45pm, 74 Jorgensen Instructor Mika Nyström <mika@async> 274 Jorgensen Teaching Assistants Karl Papadantonakis <kp@async> office hours M1-2pm, 160H Jorgensen Course Secretary Betta Dawson <bettad@cs> 256 Jorgensen System Managers Dave LeBlanc <unix-help@cs> 272 Jorgensen Chris Malek <unix-help@cs> 269 Jorgensen

Homework Assignments

Lecture Notes

• Lecture 2 (04 Apr 2002)
• Lecture 3 (09 Apr 2002)
• Lecture 4 (11 Apr 2002)
• Andrew Lines's M.S. thesis (16 Apr 2002)
• Lecture 6 (14 May 2002)
• Lecture 7 (30 May 2002)

Reference Material

• Notes on CMOS and Transistors
• Documentation for Magic
• CS/EE181 Guidelines for Reasonable Layout
• CAST Manual

Previous Years

We make no guarantees that this material is at all useful. Use at your own risk.

• 1999-2000
• 1997-1998
• 1996-1997
• 1994-1995

Catalog Entry
CS 181 abc. VLSI Design Laboratory. 12 units (3-6-3); first, second, third terms.
Digital integrated systems design, with projects involving the design, verification, and testing of high-complexity CMOS microcircuits. First-term lecture and homework topics emphasize disciplined design, and include CMOS logic, layout, and timing; computer-aided design and analysis tools; and electrical and performance considerations. Each student is required in the first term to complete individually the design, layout, and verification of a moderately complex integrated circuit. Advanced topics second and third terms include self-timed design, computer architecture, and other topics that vary year by year. Projects are large-scale designs done by teams.

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cs181@async.caltech.edu Last Modified: 29 May 2002.