2002-2003 CS 181b: VLSI Design Laboratory

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News

• Lecture Notes Posted

CS 181b General Information Time and Place Tuesdays and Thursdays, 1:15-2:45pm, 74 Jorgensen Instructor Alain Martin <alain@async> 254 Jorgensen Teaching Assistants Piyush Prakash <piyush@async> office hours Mon 5-6pm VLSI Lab Jon Dama<jd@its> office hours Wed 11pm-Midnight VLSI Lab Course Secretary Diane Goodfellow <diane@cs> 266 Jorgensen System Managers

Homework Assignments

Homework 9 (assigned 14 Jan 2003, due 21 Jan 2003)

Homework 10 (assigned 21 Jan 2003, due 28 Jan 2003)

Homework 11 (assigned 28 Jan 2003, due 04 Feb 2003)

Homework 12 (assigned 06 Feb 2003, due 13 Feb 2003)

Homework 13 (assigned 13 Feb 2003, due 20 Feb 2003)

Homework 14 (assigned 20 Feb 2003, due 27 Feb 2003)

Homework 15 -- Project (assigned 04 Mar 2003, due 21 Mar 2003)

Homework 15 Handout -- Projection

Lecture Notes

• Lecture 1 (07 Jan 2003)
• Lecture 2 (09 Jan 2003)
• Lecture 3 (14 Jan 2003)
• Lecture 4 (16 Jan 2003)
• Lecture 5 (21 Jan 2003)
• Lecture 6 (23 Jan 2003) CHPsim demo
• Lecture 7 production rules (28 Jan 2003)
• Lecture 7 cmos implementation of prs (28 Jan 2003)
• Lecture 7 model of cmos transistors (28 Jan 2003)
• Lecture 8 (30 Jan 2003)
• Lecture 9 (04 Feb 2003) - contd from 01/30
• Lecture 10 (06 Feb 2003)
• Lecture 11 single variable register (11 Feb 2003)
• Lecture 11 arbitration (11 Feb 2003)
• Lecture 12 process decomposition (13 Feb 2003)
• Lecture 13 buffers (18 Feb 2003)
• Lecture 14 implementing guarded commands (20 Feb 2003)
• Lecture 14 two to four phase converter (20 Feb 2003)
• Lecture 16 distributed mutual exclusion (27 Feb 2003)
• Lecture 18 process decomposition and slack elasticity (05 Mar 2003)
• Lecture 19 isochronic forks (11 Mar 2003)

Reference Material

• Notes on CMOS and Transistors
• Documentation for Magic
• CS/EE181 Guidelines for Reasonable Layout
• CAST Manual
• chpsim Manual PS PDF

Previous Years

We make no guarantees that this material is at all useful. Use at your own risk.

• 2001-2002
• 1999-2000
• 1997-1998
• 1996-1997
• 1994-1995

Catalog Entry
CS 181 abc. VLSI Design Laboratory. 12 units (3-6-3); first, second, third terms.
Digital integrated systems design, with projects involving the design, verification, and testing of high-complexity CMOS microcircuits. First-term lecture and homework topics emphasize disciplined design, and include CMOS logic, layout, and timing; computer-aided design and analysis tools; and electrical and performance considerations. Each student is required in the first term to complete individually the design, layout, and verification of a moderately complex integrated circuit. Advanced topics second and third terms include self-timed design, computer architecture, and other topics that vary year by year. Projects are large-scale designs done by teams.

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cs181@async.caltech.edu Last Modified: 9 Jan 2003.