2002-2003
CS 181b: VLSI Design Laboratory



News



CS 181b General Information

Time and Place
Tuesdays and Thursdays, 1:15-2:45pm, 74 Jorgensen

Instructor
Alain Martin <alain@async> 254 Jorgensen

Teaching Assistants
Piyush Prakash <piyush@async> office hours Mon 5-6pm VLSI Lab
Jon Dama<jd@its> office hours Wed 11pm-Midnight VLSI Lab

Course Secretary
Diane Goodfellow <diane@cs> 266 Jorgensen

System Managers




Homework Assignments

  • Homework 9 (assigned 14 Jan 2003, due 21 Jan 2003)
  • Homework 10 (assigned 21 Jan 2003, due 28 Jan 2003)
  • Homework 11 (assigned 28 Jan 2003, due 04 Feb 2003)
  • Homework 12 (assigned 06 Feb 2003, due 13 Feb 2003)
  • Homework 13 (assigned 13 Feb 2003, due 20 Feb 2003)
  • Homework 14 (assigned 20 Feb 2003, due 27 Feb 2003)
  • Homework 15 -- Project (assigned 04 Mar 2003, due 21 Mar 2003)
  • Homework 15 Handout -- Projection

    Lecture Notes


    Reference Material


    Previous Years

    We make no guarantees that this material is at all useful. Use at your own risk.


    Catalog Entry
    CS 181 abc. VLSI Design Laboratory. 12 units (3-6-3); first, second, third terms.

    Digital integrated systems design, with projects involving the design, verification, and testing of high-complexity CMOS microcircuits. First-term lecture and homework topics emphasize disciplined design, and include CMOS logic, layout, and timing; computer-aided design and analysis tools; and electrical and performance considerations. Each student is required in the first term to complete individually the design, layout, and verification of a moderately complex integrated circuit. Advanced topics second and third terms include self-timed design, computer architecture, and other topics that vary year by year. Projects are large-scale designs done by teams.



    cs181@async.caltech.edu
    Last Modified: 9 Jan 2003.