2002-2003
CS 181c: VLSI Design Laboratory
CS 181c General Information
Time and Place
Tuesdays and Thursdays, 1:15-2:45pm, 74 JorgensenInstructor
Alain Martin <alain@async> 254 JorgensenTeaching Assistants
Piyush Prakash<piyush@async> office hours TBA, 64 JorgensenCourse Secretary
Diane Goodfellow<diane@cs> 266 JorgensenSystem Managers
Dave LeBlanc <unix-help@cs> 272 Jorgensen
Chris Malek <unix-help@cs> 269 Jorgensen
Homework Assignments
- Homework 16 (assigned 03 Apr 2003, due 15 Apr 2003)
- Sample Project Proposal - Sisyphus
Lecture Notes
- Lecture 2 implementation of lazy stack (03 Apr 2003)
- Lecture 2 implementation of lazy stack - datapath (03 Apr 2003)
- Lecture 3 (08 Apr 2003)
- Lecture 6 (17 Apr 2003)
Reference Material
- Notes on CMOS and Transistors
- Documentation for Magic
- CS/EE181 Guidelines for Reasonable Layout
- CAST Manual
Previous Years
We make no guarantees that this material is at all useful. Use at your own risk.
Catalog Entry
CS 181 abc. VLSI Design Laboratory. 12 units (3-6-3); first, second, third terms.
Digital integrated systems design, with projects involving the design, verification, and testing of high-complexity CMOS microcircuits. First-term lecture and homework topics emphasize disciplined design, and include CMOS logic, layout, and timing; computer-aided design and analysis tools; and electrical and performance considerations. Each student is required in the first term to complete individually the design, layout, and verification of a moderately complex integrated circuit. Advanced topics second and third terms include self-timed design, computer architecture, and other topics that vary year by year. Projects are large-scale designs done by teams.
cs181@async.caltech.edu
Last Modified: 29 May 2002.