CS 181a: VLSI Design Laboratory
- Hw 2 Posted.
- Office hours updated.
- Please e-mail cs181@async for the fastest response to questions.
CS 181a General Information
Time and Place
Tuesdays and Thursdays, 1:00-2:30pm, 74 Jorgensen
Alain Martin <alain@async> 254 Jorgensen
Diane Goodfellow <diane@cs> 266 Jorgensen
Dave LeBlanc <help@cs> 272 Jorgensen
- Homework 1 (assigned 28 Sep 2006, due 05 Oct 2006)
- Homework 2 (assigned 05 Oct 2006, due 12 Oct 2006)
- Homework 3 (assigned 12 Oct 2006, due 24 Oct 2006)
- Homework 4 (assigned 24 Oct 2006, due 31 Oct - 07 Nov 2006 - extended 09 Nov 2006)
- Homework 5 (Project Proposal, due 9 Nov 2006)
- Homework 6 (assigned 09 Nov 2006, due 21 Nov 2006)
- Homework 7 (assigned 30 Nov 2006, due 10 Dec 2006)
- UNIX tutorial
- Notes on CMOS and Transistors
- Documentation for Magic
- CS/EE181 Guidelines for Reasonable Layout
- CAST Manual
We make no guarantees that this material is at all useful. Use at your own risk.
CS 181 abc. VLSI Design Laboratory. 12 units (3-6-3); first, second, third terms.
Digital integrated systems design, with projects involving the design, verification, and testing of high-complexity CMOS microcircuits. First-term lecture and homework topics emphasize disciplined design, and include CMOS logic, layout, and timing; computer-aided design and analysis tools; and electrical and performance considerations. Each student is required in the first term to complete individually the design, layout, and verification of a moderately complex integrated circuit. Advanced topics second and third terms include self-timed design, computer architecture, and other topics that vary year by year. Projects are large-scale designs done by teams.
Last Modified: 27 Sep 2006.