CS 181a: VLSI Design Laboratory
- Since several people have asked for it, here is the circuit diagram and truth table for a simple 2 bit decode circuit.
- The suggested project for this term is the ATHENA microprocessor. Note that the linked document is not the project proposal required for Homework 5. In particular, you will need to specify the functional units needed to implement the microprocessor, determine the number of inputs and outputs for the controlling PLA, and provide a floorplan for all of these components.
- The documentation for peg is here.
- Class on Wednesday, September 29 will be held downstairs in the computer lab, 104 Annenberg. You will need to have your CS cluster account set up by then.
- For this class you are required to have a CS cluster account, which you can sign up for here. If you have created an account for a previous class but have not accessed the account in a while it may be locked. In this case you will need to email help@cs and ask to have your password reset.
CS 181a General Information
Time and Place
Mondays and Wednesdays, 1:00-2:30pm, 213 Annenberg
Alain Martin <alain@async> 217 Annenberg
Xiaofei Chang <xiaofei@async> 225 Annenberg
Office hours (in 104 Annenberg):
- Tuesday 3:00 - 4:00
- Friday 3:00 - 4:00
Diane Goodfellow <diane@cs> 246 Annenberg
Dave LeBlanc <help@cs> 112 Annenberg
- Homework 1 (assigned 27 Sep 2010, due 06 Oct 2010)
- Homework 2 (assigned 06 Oct 2010, due 13 Oct 2010)
- Homework 3 (assigned 13 Oct 2008, due 25 Oct 2010)
- Homework 4 (assigned 25 Oct 2010, due 1 - 8 Nov 2010)
- Homework 5 (Project Proposal, due 15 Nov 2010) (Project Suggestion)
- Homework 6 (assigned 10 Nov 2010, due 22 Nov 2010)
- Homework 7 (due 12 Dec 2010 at 11:59 pm)
- Course Overview
- Lecture 1 (27 Sep 2010)
- Magic lab tutorial (29 Sep 2010)
- Lecture 2 (04 Oct 2010)
- Lecture 3 + CAST Lecture (06 Oct 2010)
- Lecture 4 (11 Oct 2010)
- Lecture 5 (18 Oct 2010)
- Lecture 6 (20 Oct 2010)
- Lecture 7 (25 Oct 2010)
- UNIX tutorial
- Notes on CMOS and Transistors
- Documentation for Magic
- CS/EE181 Guidelines for Reasonable Layout
- CAST Manual
We make no guarantees that this material is at all useful. Use at your own risk.
CS 181 abc. VLSI Design Laboratory. 12 units (3-6-3); first, second, third terms.
Digital integrated systems design, with projects involving the design, verification, and testing of high-complexity CMOS microcircuits. First-term lecture and homework topics emphasize disciplined design, and include CMOS logic, layout, and timing; computer-aided design and analysis tools; and electrical and performance considerations. Each student is required in the first term to complete individually the design, layout, and verification of a moderately complex integrated circuit. Advanced topics second and third terms include self-timed design, computer architecture, and other topics that vary year by year. Projects are large-scale designs done by teams.