CS 181b: VLSI Design Laboratory


CS 181b General Information

Time and Place

Alain Martin <alain@async> 217 Annenberg

Teaching Assistant
Kevin Chen <kchen2@caltech> Avery 142

Office hours (in 104 Annenberg):

  • Thursdays 9:00 PM - 11:00 PM

Chris Moore <cc@async>
Sean Keller <sean@async>

Course Secretary
Diane Goodfellow <diane@cs> 246 Annenberg

System Managers
Dave LeBlanc <help@cs> 112 Annenberg

Homework Assignments

Few if any lectures will be posted here. We highly recommend attending class.

Reference Material

Previous Years

We make no guarantees that this material is at all useful. Use at your own risk.

Catalog Entry
CS 181 ab. VLSI Design Laboratory. 12 units (3-6-3); first, second.

Digital integrated systems design, with projects involving the design, verification, and testing of high-complexity CMOS microcircuits. First-term lecture and homework topics emphasize disciplined design, and include CMOS logic, layout, and timing; computer-aided design and analysis tools; and electrical and performance considerations. Each student is required in the first term to complete individually the design, layout, and verification of a moderately complex integrated circuit. Advanced topics second terms include self-timed design, computer architecture, and other topics that vary year by year. Projects are large-scale designs done by teams.